Push-Pull Circuit With Driving Assisted By Asymmetric Charge Sharing

ABSTRACT

A push-pull circuit for an opto-electronic device includes: an output node; a pull-up circuit that, in operation, controls a falling edge rate of an input signal to the opto-electronic device while sharing charge with the output node; and a pull-down circuit that, in operation, controls a rising edge rate of the input signal to the opto-electronic device while sharing charge with the output node.

This invention was made with Government support under Prime Contract No.DE-AC52-07NA27344 awarded by DOE. The Government has certain rights inthis invention.

BACKGROUND

Opto-electronic devices, and particularly vertical-cavitysurface-emitting lasers (“VCSELs”), that are symmetrically driven yieldan output signal in which the falling edge rate is lower than the risingedge rate. This phenomenon adversely affects the signal quality of theopto-electronic device in some applications. For example, electrical andoptical link migration employs serial interfaces operating at increasingdata rates. Low bandwidth is especially an issue at high bit rates, orwith high input/output (“IO”) capacitance loads such as drivers foropts-electronic devices like a VCSEL. Such an application would benefitfrom increasing the bandwidth which is especially an issue at high bitrates, or with high IO capacitance loads like some VCSEL PAM4 driverwhich requires equalization to remove VCSEL ringing and high impedanceissues.

BRIEF DESCRIPTION OF THE DRAWINGS

Examples described herein may be understood by reference to thefollowing description taken in conjunction with the accompanyingdrawings, in which like reference numerals identify like elements.

FIG. 1 is a block diagram of a driver circuit and an opto-electronicdevice in one particular example.

FIG. 2 schematically depicts a driver circuit and an opto-electronicdevice in one particular example.

FIG. 3 illustrates a pull-down circuit that is a part of the drivercircuit of FIG. 2 in greater detail.

FIG. 4 illustrates a pull-Lip circuit that is a part of the drivercircuit of FIG. 2 in greater detail.

FIG. 5A and FIG. 5B illustrate how the control signals of the drivercircuit in FIG. 2 may be programmed in two different examples.

FIG. 6A and FIG. 6B are eye diagrams illustrating the efficacy of thepull-down circuit in FIG. 3.

FIG. 7A and FIG. 7B are eye diagrams illustrating the efficacy of thepull-up circuit in FIG. 4.

FIG. 8 is a flow chart illustrating a method as practiced in accordancewith one or more examples of the subject matter claimed below.

While examples described herein are susceptible to various modificationsand alternative forms, the drawings illustrate specific examples hereindescribed in detail by way of example. It should be understood, however,that the description herein of specific examples is not intended to belimiting to the particular forms disclosed, but on the contrary, theintention is to cover all modifications, equivalents, and alternativesfalling within the spirit and scope of the examples described herein andthe appended claims.

DETAILED DESCRIPTION

Illustrative examples, of the subject matter claimed below will now bedisclosed. In the interest of clarity, not all features of an actualimplementation are described in this specification. It will beappreciated that in the development of any such actual example, numerousimplementation-specific decisions will be made to achieve thedevelopers' specific goals, such as compliance with system-related andbusiness-related constraints, which will vary from one implementation toanother. Moreover, it will be appreciated that such a developmenteffort, even if complex and time-consuming, would be a routineundertaking for those of ordinary skill in the art having the benefit ofthis disclosure.

One characteristic of VCSELs is that the fall time is longer than therise time. This phenomenon is mainly due to charge storage in the VCSEL.This problem can be mitigated using an asymmetric charge sharing designas provided herein. The present disclosure provides a push-pull circuitfor an opto-electronic device that drives the opto-electric deviceasymmetrically by controlling the rising edge rate or the falling edgerate of the input signal. The push-pull circuit also shares charge withan output node in the course of its operation. This is referred to in ageneral sense as “driving assisted by charge sharing”.

FIG. 1 schematically depicts in a simplified fashion a driver circuit100 and an opto-electronic device 105 in one particular example. Moreparticularly, in the example of FIG. 1, the driver circuit 100 is a linkoptical driver and the opto-electronic device 105 is a VCSEL. Theexamples illustrated herein all employ a VCSEL as the opto-electronicdevice 105 but it is to be understood that the opto-electronic device105 may be an opto-electronic device other than a VCSEL in otherexamples not shown.

The driver circuit 100 includes a push-pull circuit 110 that, in turn,includes a pull-up circuit 115 and a pull-down circuit 120. In someexamples, the pull-up circuit 115 provides current sourcing of theopto-electronic device—that is, it provides the “push” in the push-pull.In some examples, the pull-down circuit 120 provides currentsinking—such that it provides the “pull” in the push-pull. The pull-upcircuit 115 and the pull-down circuit 120 share charge with theopto-electronic device 105 in a manner described more fully belowthrough a output node 125.

The push-pull circuit 110 asymmetrically drives the opto-electronicdevice 105 through the output node 125 and over line 130 to equalize theoutput signal 135 from the opto-electronic device 105. To do so, thepull-up circuit 115, in operation, controls a falling edge rate of aninput signal 140 to the opto-electronic device 105 while sharing chargewith the output node 125. The pull-down circuit 120, in operation,controls a rising edge rate of the input signal 140 to theopto-electronic device 105 while sharing charge with the output node125.

The rising and falling edge rates of the input signal 140 may thereforediffer by controlling at least one of the rising edge rate or thefalling edge rate of the input signal via the pull-down circuit 120 orthe pull-up circuit 115. The input signal 140 is consequently“asymmetric” such that the optoelectronic device 105 is “asymmetricallydriven”. This difference in input rising and falling edge rates producesequal rising and falling edge rates in the output signal 135. The outputsignal 135 is therefore “equalized”. This equalization in the outputsignal mitigates ringing and high impedance issues discussed above.

Those in the art having the benefit of this disclosure will appreciatethat the driver circuit 100 in FIG. 1 is greatly simplified. FIG. 2shows in greater detail one particular example of a driver circuit inaccordance with the subject matter claimed below. FIG. 2 shows a drivercircuit 200 for an opto-electronic device 205. Again, theopto-electronic device 205 is a VCSEL but the subject, matter claimedbelow is not limited to VCSELs.

The driver circuit 200 includes a regulator 210, a pre-driver 212, and apush-pull circuit 215. The push-pull circuit 215 includes a pull-upcircuit 220 and a pull-down circuit 225. The driver circuit 200 alsoincludes a transmission line TL. The driving current, for theopto-electronic device 205 may be transmitted from the push-pull circuit215 over the transmission line TL through the output node V_(out2).Source V_(DD) provides a bias for the regulator 210 and theopto-electronic device 205 while regulator 210 operates as a protectionfor the source V_(DD). The pre-driver 212 drives the switches 240, 245by generating the control signal DATA_(P). The current source 228provides a DC bias current for the opto-electronic device 205.

Some of the details in FIG. 2 are implementation specific and may beomitted or altered in other examples. For example, the capacitor C_(cm)connects the termination resistor 230 to ground for establishing acorrect common mode termination voltage at node V_(cm) andstabilization. C_(cm) holds the voltage on the left-hand side of thetermination resistor 230 so that V_(cm) appears to originate from avoltage source. The auxiliary current source I_(ua) (controlled by theswitch 234) and the auxiliary current sink I_(ua) (controlled by theswitch 238) assist in this function. The auxiliary current source I_(ua)and auxiliary current sink I_(da), as well as their associated switches234, 238, may be omitted in some examples if the capacitance value ofC_(cm) is raised to a sufficiently high value. The inductor T_(coil) isalso optional and may be omitted in some examples. In these embodiments,the transmission line TL may be connected directly to the V_(out2) node.So may the termination resistor 230.

Still referring to FIG. 2, the pull-up circuit 220 includes a capacitorC_(p) in parallel with a current source I_(u), the combination of whichis in series with the switch 240. The switch 240 controls thecontribution of the current source I_(u) and capacitor C_(p) to thedriving current for the opto-electronic device 205. Similarly, thepull-down circuit 225 includes a capacitor C_(n) in parallel with acurrent sink I_(d) and the combination of the capacitor C_(n) and thecurrent sink I_(d) is in series with the switch 245. The switch 245controls the contribution of the current sink I_(d) and the capacitorC_(n) to the driving current, for the opto-electronic device 205. Thepull-up circuit 220 and the pull-down circuit 225 together produce thedriving current for the opto-electronic device 205 that is deliveredthrough the node V_(out2), the inductor T_(coil) and the transmissionline TL.

As described above, one characteristic of VCSELs, such as theopto-electronic device 205, is that the fall time is longer than therise time in the laser signal that it outputs. This phenomenon is mainlydue to charge storage in the VCSEL. When the fall time is slower becauseof symmetric driving, signal quality is adversely impacted. To solve, orat least mitigate, this problem, the pull-up current going through theswitch 240 in FIG. 2 should be higher at an earlier time after theswitch 240 turns on than it should be later while the switch 240 is on.Similarly, the pull-down current through the switch 245 in FIG. 2 shouldbe higher after the switch 245 turns on than it should be later afterthe switch 240 has been on for some time. The timing and magnitude ofthis decrease over time in the pull-up and pull-down currents willdepend on a number of implementation specific factors such as therelative speed of the process (FAST, SLOW, etc.), temperature andvoltage. Other factors may be implicated in other examples as well in animplementation specific manner.

This can be accomplished by using a larger pull-up charge sharingcapacitor C_(p) relative to pull-down charge sharing capacitor C_(n),e.g., C_(p)>C_(n). The pull-down charge sharing capacitor C_(n) iscontrolled by a control signal C_(n)_ctl[x:y] and the pull-up chargesharing capacitor is C_(p) is controlled by a control signalC_(p)_ctl[x:y]. The different capacitor values for C_(p) and C_(n) canbe obtained by selecting different C_(p)_ctl[x:y] and C_(n)_ctl[x:y]values or the same value with different capacitor sizes. The illustratedexample selects different capacitor values by selecting a differentcontrol value in the control signals C_(p)_ctl[x:y], C_(n)_ctl[x:y].

FIG. 3 illustrate one example of the pull-down circuit 225 that is apart of the driver circuit 200 of FIG. 2, and more particularly a partof the push-pull circuit 215, in greater detail. FIG. 3 shows thecurrent sink I_(d), the switch 245, and variable capacitor C_(n). Theswitch 245 is a negative channel Field Effect Transistor (“nFET”). Thereis an additional switch in FIG. 3 that is not shown in FIG. 2 for thesake of clarity. The opto-electronic component 205, shown in FIG. 2, isalways on and the switch 300 protects the pull-down circuit 225 fromovervoltage. The variable capacitor C_(n) includes a plurality ofcapacitors 305 in parallel that are switched into and out of the circuitby the respective switches 310. The switches 310 are controlled by thecontrol signal C_(n)_ctl[x:y]. In this example, there are two capacitors305, but this number may vary in accordance with considerationsdiscussed further below.

When the control signal DATA_(P) is logic 0, the switch 245 is off andthe node C_(md) is discharged to 0. When the DATA_(P) is turned on,initially there is big (bigger than the steady state current) currentflow from V_(out2) to charge the node C_(md) to a steady state voltagevalue. This extra charge moving from V_(out2) to the node C_(md) iscalled driving assisted by charge sharing. The amount of extra chargerequired to charge the node C_(md) to a steady state value is dependenton the capacitance on the node C_(md). The higher the capacitance on thenode C_(md), the higher the extra charge removed from the V_(out2) orvice versa. The control signal C_(n)_ctl[x:y] controls the strength ofthe charge sharing from the pull-down circuit 225.

FIG. 4 illustrate one example of the pull-up circuit 220 that is a partof the driver circuit 200 of FIG. 2, and more particularly a part of thepush-pull circuit 215, in greater detail. FIG. 4 shows the currentsource I_(u), the switch 240, and variable capacitor C_(p). The switch240 is a positive channel Field Effect Transistor (“pFET”). There is an,additional switch in FIG. 4 that is not shown in FIG. 2 for the sake ofclarity. The opts electronic component 205, shown in FIG. 2, is alwayson and the switch 400 protects the pull-up circuit 220 from overvoltage.The variable capacitor C_(p) includes a plurality of capacitors 405 inparallel that are switched into and out of the circuit by the respectiveswitches 410. The switches 410 are controlled by the control signalC_(p)_ctl[x:y]. In this example, there are two capacitors 405, but thisnumber may vary in accordance with considerations discussed furtherbelow,

When the control signal DATA_(P) is logic 1, the switch 245 is off andthe node C_(mu) is is charged to the output of the regulator 210, shownin FIG. 2. When the DATA_(P) is turned on, initially there is a largerthan the steady state current flowing from V_(out2) to charge the nodeC_(mu) to a steady state voltage value. This extra charge moving fromV_(out2) to the node C_(mu) is called driving assisted by chargesharing. The amount of extra charge used to charge the node C_(mu) to asteady state value is dependent on the capacitance on the node C_(mu).The higher the capacitance on the node C_(mu), the higher the extracharge removed from the V_(out2) or vice versa. The signalsC_(p)_ctl[x:y] control the strength of the charge sharing from thepull-up circuit 220.

In the illustrated example, the control signals C_(p)_ctl[x:y],C_(n)_ctl[x:y] include two select bits for each respective chargesharing capacitor C_(p), C_(n). Thus, C_(p)_ctl[x:y]=SEL_(p)<x:y> andC_(n)_ctl[x:y]=SEL_(n)<x:y> where x is either a logic 0 or a logic 1 andy is either a logic 0 or a logic 1. Each select bit x, y controls one ofthe switches 310, 410 to add capacitance to the node C_(mu) and C_(md).There are four possible combinations for each of C_(p)_ctl[x:y], Onctl[x:y] that can be selected in which x and y are both off, bit x onand bit y off, bit x off and bit y on, or both on, Assuming that thecapacitors 305, 405 and the switches 310, 410 are not the same size,that represents four possible capacitance values in each of the pull-upcircuit 215 and the pull-down circuit 225. Those values are zero, thecapacitance value of the first capacitor, the capacitance of the secondcapacitor, or the sum of the capacitance values of the first and secondcapacitors.

Other examples may use different numbers of capacitors with differentnumbers of select bits. For instance, three capacitors and three selectbits could be used to create eight possible capacitance values. This maybe useful where one might want to use more numbers of bits/capacitors inorder to provide more degrees of freedom in, for example, smallercapacitance step sizes or larger ranges of capacitances.

The control signals C_(p)_ctl[x:y], C_(n)_ctl[x:y] are, in theillustrated example, programmable. The subject matter claimed belowadmits wide variation in how this programming may be implemented. Twoexamples of how the programmable aspects of the pull-down circuit ofFIG. 3 and the pull-up circuit of FIG. 4 may be implemented are shown inFIG. 5A and FIG. 5B.

In one example, shown in FIG. 5A, the values of the select bits x and yare determined by fuses 500 (only one indicated) and are loaded intoregisters 505 (only one indicated). More particularly, the drivercircuit 200 and the opto-electronic device 205, both shown in FIG. 2,are fabricated into a single device not otherwise shown. The fuses 500and registers 550 are also fabricated as a part of this device. Thefuses 500 may be programmed using, techniques similar to those used inprogramming an Electrically Erasable Programmable Memory (“EEPROM”). Thevalues determined by the fuses 500 are then loaded into the registers505 whenever the driver circuit 100 and opto-electronic device 135 arestarted up.

FIG. 5B illustrates a processor 510 and an associated memory 515 withwhich the programmable aspects of the pull-down circuit 225 of FIG. 3and the pull-up circuit 220 of FIG. 4 may be implemented in someexamples. The processor 510 may be any suitable kind of processorincluding, for instance, a micro-controller. The memory 515 may be anykind of random access memory (“RAM”) or read only memory (“ROM”). In theillustrated embodiment, the memory 515 is ROM. The processor 510communicates with the memory 515 over line 520. On the memory 515resides a set of instructions 525 and a set of values 530. When thedevice on which the driver circuit 200 and opts-electronic device 205are fabricated is powered on, the processor 510 fetches and executes theinstructions 525. Executing the instructions causes the processor 510 tofetch the values 530 and load them into the registers 535 (only oneindicated) over the line 520.

The examples shown in FIG. 5A and FIG. 5B are but two examples of howthe control signals Cp_ctl[x:y], Cn_ctl[x:y] may be programmed invarious implementations of the subject matter claimed below. Those inthe art having the benefit of the disclosure herein will appreciatealternative ways in which the programming may be implemented. Forexample, this functionality may alternatively be implemented in anappropriately programmed EEPROM or an Application Specific IntegratedCircuit (“ASIC”). Thus, in other examples, the programming of thecontrol signals Cp_ctl[x:y], Cn_ctl[x:y] may be implemented in otherways including, but not limited to, other means having structureequivalent to those disclosed herein that perform the disclosedfunctionality.

Similarly, the implementations of the pull-up circuit 150, 220 and thepull-down circuit 120, 225 disclosed herein in FIG. 1 and FIG. 2-FIG. 3and discussed in associated text are merely examples of how theassociated functionality may be, implemented. Other examples may chooseother implementations within the scope and spirit of that which isclaimed below. Thus, in other examples, the pull-up circuit 220 and thepull-down circuit 225 may be implemented in other ways including, butnot limited to, other means having structure equivalent to thosedisclosed herein that perform the disclosed functionality.

FIG. 6A and FIG. 6B are eye diagrams of the output signal of theopto-electronic device 205 illustrating the efficacy of the pull-downcircuit 225 in FIG. 3 with two settings. The eye diagram of FIG. 6A wasgenerated with Cp_ctl=[0:0] and Cn_ctl=[0:0] (i.e., symmetric driving ofthe opto-electronic device). The eye diagram of FIG. 6B was generatedwith Cp_ctl=[1:1] and Cn_ctl=0 (i.e., asymmetric driving). The eyeheight is improved by 13%, thereby indicating an improved performance.

FIG. 7A and FIG. 7B are eye diagrams of the output signal of theopto-electronic device 205 illustrating the efficacy of the pull-upcircuit 220 in FIG. 4 with two settings. The eye diagram of FIG. 7A wasgenerated with Cp_ctl=[0:0] and Cn_ctl=[0:0] (i.e., symmetric driving ofthe opto-electronic device). The eye diagram of FIG. 7B was generatedwith Cp_ctl=[1:1] and Cn_ctl=0 (i.e., asymmetric driving). The eyeheight is improved by 13%, thereby indicating an improved performance.

FIG. 8 is a flowchart depicting a method 800 as practiced in accordancewith one or more examples of the subject matter claimed below. Themethod 800 begins by generating (at 810) an input signal for anopto-electronic device from a push-pull driver circuit. Next, charge isshared (at 820) in the push-pull driver circuit between the input signaland at least one variable capacitance capacitor to control at least oneof the rising edge rate or the falling edge rate of the input signal.Then, the opto-electronic device is asymmetrically driven (at 830) withthe controlled-edge input signal to produce an equalized optical outputsignal from the opto-electronic device.

This concludes the detailed description. The particular examplesdisclosed above are illustrative only, as examples described herein maybe modified and practiced in different but equivalent manners apparentto those skilled in the art having the benefit, of the teachings herein.Furthermore, no limitations are intended to the details of constructionor design herein shown, other than as described in the claims below. Itis therefore evident that the particular examples disclosed above may bealtered or modified and all such variations are considered within thescope and spirit of the appended claims. Accordingly, the protectionsought herein is as set forth in the claims below. It will be recognizedthat the terms “comprising” “including,” and “having,” as used herein,are specifically intended to be read as open-ended terms of art. Theterm “or,” in reference to a list of two or more items, covers all ofthe following interpretations of the word: any of the items in the list,all of the items in the list, and any combination of the items in thelist. As used herein, the terms “connected,” “coupled,” or any variantthereof means any connection or coupling, either direct or indirect,between two or more elements; the coupling or connection between theelements can be physical (e.g., mechanical), logical, electrical,optical, or a combination thereof.

1. A push-pull circuit for an opto-electronic device, comprising: anoutput node; a pull-up circuit that, in operation, controls a fallingedge rate of an input signal to the opto-electronic device while sharingcharge with the output node, the pull-up circuit comprising: a currentsource; a variable capacitance capacitor in parallel with the currentsource; and a controllable switch in series with the current source andthe variable capacitance capacitor to connect and disconnect the currentsource and the variable capacitance capacitor to and from the outputnode; and a pull-down circuit that, in operation, controls a rising edgerate of the input signal to the opto-electronic device while sharingcharge with the output node, the pull-down circuit comprising: a currentsink; a variable capacitance capacitor in parallel with the currentsink; and a controllable switch in series with the current sink and thevariable capacitance capacitor to connect and disconnect the currentsink and the variable capacitance capacitor to and from the output node,wherein the push-pull circuit outputs an equalized input signal to theopto-electronic device based on a difference in the falling edge ratecaused by the pull-up circuit and the rising edge rate by the pull-downcircuit.
 2. The push-pull circuit of claim 1, wherein the pull-upcircuit comprises means for controlling the falling edge rate of theinput signal to the opto-electronic device.
 3. The push-pull of claim 2,wherein the means for controlling includes: a current source; a variablecapacitance capacitor in parallel with the current source; and acontrollable switch in series with the current source and the variablecapacitance capacitor to connect and disconnect the current source andthe variable capacitance capacitor to and from the output node. 4.(canceled)
 5. The push-pull circuit of claim 1, wherein the pull-downcircuit comprises means for controlling the rising edge rate of theinput signal to the opto-electronic device.
 6. The push-pull circuit ofclaim 5, wherein the means for controlling includes: a current sink; avariable capacitance capacitor in parallel with the current sink; and acontrollable switch in series with the current sink and the variablecapacitance capacitor to connect and disconnect the current sink and thevariable capacitance capacitor to and from the output node. 7.(canceled)
 8. An apparatus comprising: an opto-electronic device; adriver circuit that, in operation, asymmetrically drives an input signalto the opto-electronic device, the driver circuit including: an outputnode through which the input signal is transmitted to theopto-electronic device; a pull-up circuit including: a current source; afirst variable capacitance capacitor in parallel with the currentsource; and a first controllable switch in series with the currentsource and the first variable capacitance capacitor to connect anddisconnect the current source and the first variable capacitancecapacitor to and from the output node, the pull-up circuit sharingcharge between the output node and the first variable capacitancecapacitor to control the falling edge rate of the input signal to theopto-electronic device when connected to the output node; and apull-down circuit including: a current sink; a second variablecapacitance capacitor in parallel with the current sink; and a secondcontrollable switch in series with the current sink and the secondvariable capacitance capacitor to connect and disconnect the currentsink and the second variable capacitance capacitor to and from theoutput node, the pull-down circuit sharing charge between the outputnode and the second variable capacitance capacitor to control the risingedge rate of the input signal to the opto-electronic device whenconnected to the output node, wherein the driver circuit asymmetricallydrives the input signal based on a difference in the falling edge ratecaused by the pull-up circuit and the rising edge rate by the pull-downcircuit.
 9. The apparatus of claim 8, wherein the opto-electronic deviceis a vertical-cavity surface-emitting laser.
 10. The apparatus of claim8, wherein the driver circuit is a link optical driver.
 11. Theapparatus of claim 8, wherein at least one of the first variablecapacitance capacitor or the second variable capacitance capacitorfurther comprises: a plurality of capacitors arranged in parallel; and aplurality of controllable switches, each controllable switch of theplurality of controllable switches being arranged in series with arespective one of the plurality of capacitors and switching therespective one of the plurality of capacitors in and out of thepull-down circuit or the pull-up circuit.
 12. The apparatus of claim 11,wherein the plurality of switches are controlled by a programmablesignal.
 13. The apparatus of claim 12, further comprising means forprogramming the programmable signal.
 14. A method comprising: generatingan input signal for an opto-electronic device from a push-pull drivercircuit; sharing charge in the push-pull driver circuit between theinput signal and at least one variable capacitance capacitor to controlat least one of the rising edge rate or the falling edge rate of theinput signal; and asymmetrically driving the opto-electronic device withthe controlled-edge input signal to produce an equalized optical outputsignal from the opto-electronic device, wherein a first variablecapacitance capacitor of a push portion of the push-pull driver circuitis in parallel with a current source, and a second variable capacitancecapacitor of a pull portion of the push-pull driver circuit is inparallel with a current sink, and wherein asymmetrically driving theopto-electronic device with the controlled-edge input signal is based ona difference in the falling edge rate and the rising edge rate.
 15. Themethod of claim 14, wherein sharing charge in the push-pull drivercircuit includes: sharing charge between the input signal and the firstvariable capacitance capacitor in the push portion of the push-pulldriver circuit; and sharing charge between the input signal and thesecond variable capacitance capacitor in the pull portion of thepush-pull driver circuit.
 16. The method of claim 15, wherein at leastone of sharing charge between the input signal and a first variablecapacitance and sharing charge between the input signal and the secondvariable capacitance includes programming a signal to control thevariable capacitance of at least one of the first variable capacitanceand the second variable capacitance.
 17. The method of claim 14, whereinsharing charge in the push-pull driver circuit between the input signaland at least one variable capacitance capacitor to control at least oneof the rising edge rate or the falling edge rate of the input signalcomprises sharing charge between the input signal at the first variablecapacitance capacitor in a pull-up circuit to control the falling edgerate of the input signal.
 18. The method of claim 14, wherein sharingcharge in the push-pull driver circuit between the input signal and atleast one variable capacitance capacitor to control at least one of therising edge rate or the falling edge rate of the input signal comprisessharing charge between the input signal at the second variablecapacitance capacitor in a pull-down circuit to control the rising edgerate of the input signal.
 19. The method of claim 14, wherein the atleast one variable capacitance capacitor comprises a plurality ofcapacitors in parallel and the value of the capacitance is controlled byswitching the capacitors in and out of the push-pull driver circuit. 20.The method of claim 14, wherein the opto-electronic device comprises avertical-cavity surface-emitting laser and the push-pull driver circuitcomprises a portion of a link optical driver.